1. Field of the Invention
The present invention relates to an active array substrate and, more particularly, to an active array substrate for a liquid crystal display (LCD).
2. Description of Related Art
In reference to LCD panel technologies, the structure of storage capacitance Cs on a scan line (hereinafter, referring to as “Cs on Gate”) is designed and produced by implementing and overlapping an insulation layer between a scan line and a pixel electrode.
In general, as compared with the structure of storage capacitance on a common line (hereinafter, referring to as “Cs on Common”) that is produced by overlapping a common line and a pixel electrode, the pixels formed by the structure “Cs on Gate” have the advantage of preferred aperture ratio because the storage capacitance is stacked on the scan line without additional affecting the aperture ratio, but also have the disadvantage of suffering a higher load on the scan line due to the capacitance connected in series on the scan line.
Accordingly, for the structure “Cs on Gate”, the RC delay on the scan line causes the transmission waveform to have a quite sharp distortion. FIG. 1A is a schematic diagram of the waveform before passing through the scan line. FIG. 1B is a schematic diagram of the waveform after passing through the scan line.
As shown in FIGS. 1A and 1B, the waveform passing through the scan line is gradually changed and distorted, which causes at least one of the non-uniform brightness, the non-uniform contrast, and frame flicker of the LCD, and further affects the display quality.
Therefore, it is desirable to provide an improved active array substrate to mitigate and/or obviate the aforementioned problems.